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Summary
| Description |
English: This picture shows a 12-input AND gate realized as a two-level tree of three four-input NAND gates and one three-input NOR gate. In CMOS, this is much faster than a tree using AND gates only, see [[1]]. |
| Date | |
| Source | Own work |
| Author | Trex4321 |
Licensing
I, the copyright holder of this work, hereby publish it under the following license:
 
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This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
| The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.
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File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 09:56, 4 February 2024 | | 268 × 153 (5 KB) | Trex4321 | Uploaded own work with UploadWizard |
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