A simple program counter. The current count is the memory address of the next instruction to be executed. Upon processor reset, the count is zeroed so that execution will begin at address zero. When an instruction is fetched from memory, CE is asserted to allow the counter to increment the count and thus advance to the next sequential instruction address. If it becomes necessary to switch execution to a different instruction sequence (due to executing a branch instruction, subroutine call, interrupt, or return from subroutine or interrupt), the address of the first instruction in the new sequence is applied to the Data inputs and Load is asserted; this overrides CE (if asserted) and copies Data to Count.

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