Frame synchronization

(Redirected from Flag sequence)

In telecommunications, frame synchronization or framing is the process by which, while receiving a stream of fixed-length frames, the receiver identifies the frame boundaries, permitting the data bits within the frame to be extracted for decoding or retransmission.

When packets of varying length are sent, it is necessary to have an instantly recognizable packet-end delimiter (e.g., Ethernet's end of stream symbol). Loss of carrier signal can be interpreted as a packet-end delimiter in some cases. When a continuous stream of fixed-length frames are sent, a synchronized receiver can in principle identify frame boundaries forever. In practice, receivers can usually maintain synchronization despite transmission errors; bit slips are much rarer than bit errors. Thus, it is acceptable to use a much smaller frame boundary marker, at the expense of a lengthier process to establish synchronization in the first place.

Frame synchronization is achieved when the incoming frame alignment signals are identified (that is, distinguished from data bits), permitting the data bits within the frame to be extracted for decoding or retransmission.

Framing

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If the transmission is temporarily interrupted, or a bit slip event occurs, the receiver must re-synchronize.

 
Frame synchronized PCM stream — telemetry application

The transmitter and the receiver must agree ahead of time on which frame synchronization scheme they will use.

Common frame synchronization schemes are:

Framing bit
A common practice in telecommunications, for example in T-carrier, is to insert, in a dedicated time slot within the frame, a noninformation framing bit that is used for synchronization of the incoming data with the receiver. In a bit stream, framing bits are predictable (do not carry information), and occur at specified positions in the frame. Correct framing is verified when almost all framing bits (minus a small allowance for transmission errors) have their predicted values.
Syncword and flag sequence framing
Rather than a single bit, some systems use a multi-bit syncword in each frame, or a flag sequence that marks the beginning and end of each frame. High-Level Data Link Control and similar systems use flag sequences.[1]
CRC-based framing
Some telecommunications hardware uses CRC-based framing, where correct framing is verified when almost all frames have valid CRCs.

Frame synchronizer

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PCM stream prior to frame synchronization

In telemetry applications, a frame synchronizer is used to locate frame boundaries within a serial pulse-code modulated (PCM) binary stream.

The frame synchronizer immediately follows the bit synchronizer in most telemetry applications. Without frame synchronization, decommutation is impossible.

 
Frame-synchronized PCM stream

The frame synchronizer searches the incoming bit-stream for occurrences of the frame synchronization pattern. If the pattern persists for long enough that an accidental match is implausible, the synchronizer declares the data synchronized and available for decoding. If a large number of mis-matches occur, the synchronizer declares a loss of synchronization.

The search can be sequential (only consider one starting point at a time), or multiple candidate starting points may be considered at once. Advanced techniques continue searching even while synchronization is established, so that, if synchronization is lost, by the time the loss is noticed a new frame start position has been found.[2]

 
Different types of commutation within a frame synchronized PCM stream

It is not uncommon to have multiple levels of frame synchronization, where a series of frames is assembled into a larger "superframe" or "major frame". Individual frames are then "minor frames" within that superframe. Each frame contains a subframe ID (often a simple counter) which identifies its position within the superframe. A second frame synchronizer establishes superframe synchronization. This allows subcommutation, where some data is sent less frequently than every frame.

See also

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References

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  1. ^ Simpson, William A. (July 1994). PPP in HDLC-like Framing. Internet Engineering Task Force. doi:10.17487/RFC1662. RFC 1662.
  2. ^ US patent 5621773, "Method and Apparatus for Fast Synchronization of T1 Extended Superframes", issued 1997-04-15, assigned to LSI Logic Corporation 

  This article incorporates public domain material from Federal Standard 1037C. General Services Administration. Archived from the original on 2022-01-22. (in support of MIL-STD-188).

Scientific articles

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