Wikipedia

Photolithography

(Redirected from Photolithographic)
This article is about semiconductor manufacturing. For printing on paper, see lithography. For similar processes for metals, see photochemical machining.

Photolithography (also known as optical lithography) is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer.

The process begins with a photosensitive material, called a photoresist, being applied to the substrate. A photomask that contains the desired pattern is then placed over the photoresist. Light is shone through the photomask, exposing the photoresist in certain areas. The exposed areas undergo a chemical change, making them either soluble or insoluble in a developer solution. After development, the pattern is transferred onto the substrate through etching, chemical vapor deposition, or ion implantation processes.

Ultraviolet (UV) light is typically used.[1]

Photolithography processes can be classified according to the type of light used, including ultraviolet lithography, deep ultraviolet lithography, extreme ultraviolet lithography (EUVL), and X-ray lithography. The wavelength of light used determines the minimum feature size that can be formed in the photoresist.

Photolithography is the most common method for the semiconductor fabrication of integrated circuits ("ICs" or "chips"), such as solid-state memories and microprocessors. It can create extremely small patterns, down to a few nanometers in size. It provides precise control of the shape and size of the objects it creates. It can create patterns over an entire wafer in a single step, quickly and with relatively low cost. In complex integrated circuits, a wafer may go through the photolithographic cycle as many as 50 times. It is also an important technique for microfabrication in general, such as the fabrication of microelectromechanical systems. However, photolithography cannot be used to produce masks on surfaces that are not perfectly flat. And, like all chip manufacturing processes, it requires extremely clean operating conditions.

Photolithography is a subclass of microlithography, the general term for processes that generate patterned thin films. Other technologies in this broader class include the use of steerable electron beams, or more rarely, nanoimprinting, interference, magnetic fields, or scanning probes. On a broader level, it may compete with directed self-assembly of micro- and nanostructures.[2]

Photolithography shares some fundamental principles with photography in that the pattern in the photoresist is created by exposing it to light — either directly by projection through a lens, or by illuminating a mask placed directly over the substrate, as in contact printing. The technique can also be seen as a high precision version of the method used to make printed circuit boards. The name originated from a loose analogy with the traditional photographic method of producing plates for lithographic printing on paper;[3] however, subsequent stages in the process have more in common with etching than with traditional lithography.

Conventional photoresists typically consist of three components: resin, sensitizer, and solvent.

Etymology

edit

The root words photo, litho, and graphy all have Greek origins, with the meanings 'light', 'stone' and 'writing' respectively. As suggested by the name compounded from them, photolithography is a printing method (originally based on the use of limestone printing plates) in which light plays an essential role.

History

edit

In the 1820s, Nicephore Niepce invented a photographic process that used Bitumen of Judea, a natural asphalt, as the first photoresist. A thin coating of the bitumen on a sheet of metal, glass or stone became less soluble where it was exposed to light; the unexposed parts could then be rinsed away with a suitable solvent, baring the material beneath, which was then chemically etched in an acid bath to produce a printing plate. The light-sensitivity of bitumen was very poor and very long exposures were required, but despite the later introduction of more sensitive alternatives, its low cost and superb resistance to strong acids prolonged its commercial life into the early 20th century.

In 1940, Oskar Süß created a positive photoresist by using diazonaphthoquinone, which worked in the opposite manner: the coating was initially insoluble and was rendered soluble where it was exposed to light.[4] In 1954, Louis Plambeck Jr. developed the Dycryl polymeric letterpress plate, which made the platemaking process faster.[5] Development of photoresists used to be carried out in batches of wafers (batch processing) dipped into a bath of developer, but modern process offerings do development one wafer at a time (single wafer processing) to improve process control.[6]

In 1957 Jules Andrus patented a photolitographic process for semiconductor fabrication, while working at Bell Labs.[7][8] At the same time Moe Abramson and Stanislaus Danko of the US Army Signal Corps developed a technique for printing circuits.[8]

In 1952, the U.S. military assigned Jay W. Lathrop and James R. Nall at the National Bureau of Standards (later the U.S. Army Diamond Ordnance Fuze Laboratory, which eventually merged to form the now-present Army Research Laboratory) with the task of finding a way to reduce the size of electronic circuits in order to better fit the necessary circuitry in the limited space available inside a proximity fuze.[9] Inspired by the application of photoresist, a photosensitive liquid used to mark the boundaries of rivet holes in metal aircraft wings, Nall determined that a similar process can be used to protect the germanium in the transistors and even pattern the surface with light.[10] During development, Lathrop and Nall were successful in creating a 2D miniaturized hybrid integrated circuit with transistors using this technique.[9] In 1958, during the IRE Professional Group on Electron Devices (PGED) conference in Washington, D.C., they presented the first paper to describe the fabrication of transistors using photographic techniques and adopted the term "photolithography" to describe the process, marking the first published use of the term to describe semiconductor device patterning.[10][3]

Despite the fact that photolithography of electronic components concerns etching metal duplicates, rather than etching stone to produce a "master" as in conventional lithographic printing, Lathrop and Nall chose the term "photolithography" over "photoetching" because the former sounded "high tech."[9] A year after the conference, Lathrop and Nall's patent on photolithography was formally approved on June 9, 1959.[11] Photolithography would later contribute to the development of the first semiconductor ICs as well as the first microchips.[9]

Process

edit
 
Simplified illustration of dry etching using positive photoresist during a photolithography process in semiconductor microfabrication (not to scale).

A single iteration of photolithography combines several steps in sequence. Modern cleanrooms use automated, robotic wafer track systems to coordinate the process.[12] The procedure described here omits some advanced treatments, such as thinning agents.[13] The photolithography process is carried out by the wafer track and stepper/scanner, and the wafer track system and the stepper/scanner are installed side by side. Wafer track systems are also known as wafer coater/developer systems, which perform the same functions.[14][15] Wafer tracks are named after the "tracks" used to carry wafers inside the machine,[16] but modern machines do not use tracks.[15]

Cleaning

edit

If organic or inorganic contaminations are present on the wafer surface, they are usually removed by wet chemical treatment, e.g. the RCA clean procedure based on solutions containing hydrogen peroxide. Other solutions made with trichloroethylene, acetone or methanol can also be used to clean.[17]

Preparation

edit

The wafer is initially heated to a temperature sufficient to drive off any moisture that may be present on the wafer surface; 150 °C for ten minutes is sufficient. Wafers that have been in storage must be chemically cleaned to remove contamination. A liquid or gaseous "adhesion promoter", such as Bis(trimethylsilyl)amine ("hexamethyldisilazane", HMDS), is applied to promote adhesion of the photoresist to the wafer. The surface layer of silicon dioxide on the wafer reacts with HMDS to form tri-methylated silicon-dioxide, a highly water repellent layer not unlike the layer of wax on a car's paint. This water repellent layer prevents the aqueous developer from penetrating between the photoresist layer and the wafer's surface, thus preventing so-called lifting of small photoresist structures in the (developing) pattern. In order to ensure the development of the image, it is best covered and placed over a hot plate and let it dry while stabilizing the temperature at 120 °C.[18]

Photoresist application

edit

The wafer is covered with photoresist liquid by spin coating. Thus, the top layer of resist is quickly ejected from the wafer's edge while the bottom layer still creeps slowly radially along the wafer. In this way, any 'bump' or 'ridge' of resist is removed, leaving a very flat layer. However, viscous films may result in large edge beads which are areas at the edges of the wafer or photomask[19] with increased resist thickness whose planarization has physical limits.[20] Often, Edge bead removal (EBR) is carried out, usually with a nozzle, to remove this extra resist as it could otherwise cause particulate contamination.[21][22][23] Final thickness is also determined by the evaporation of liquid solvents from the resist. For very small, dense features (< 125 or so nm), lower resist thicknesses (< 0.5 microns) are needed to overcome collapse effects at high aspect ratios; typical aspect ratios are < 4:1.

The photoresist-coated wafer is then prebaked to drive off excess photoresist solvent, typically at 90 to 100 °C for 30 to 60 seconds on a hotplate.[24] A BARC coating (Bottom Anti-Reflectant Coating) may be applied before the photoresist is applied, to avoid reflections from occurring under the photoresist and to improve the photoresist's performance at smaller semiconductor nodes such as 45 nm and below.[25][26][27] Top Anti-Reflectant Coatings (TARCs) also exist.[28] EUV lithography is unique in the sense it allows for the use of photoresists with metal oxides.[29]

Exposure and developing

edit

After prebaking, the photoresist is exposed to a pattern of intense light. The exposure to light causes a chemical change that allows some of the photoresist to be removed by a special solution, called "developer" by analogy with photographic developer. Positive photoresist, the most common type, becomes soluble in the developer when exposed; with negative photoresist, unexposed regions are soluble in the developer.

A post-exposure bake (PEB) is performed before developing, typically to help reduce standing wave phenomena caused by the destructive and constructive interference patterns of the incident light. In deep ultraviolet lithography, chemically amplified resist (CAR) chemistry is used. This resist is much more sensitive to PEB time, temperature, and delay, as the resist works by creating acid when it is hit by photons, and then undergoes an "exposure" reaction (creating acid, making the polymer soluble in the basic developer, and performing a chemical reaction catalyzed by acid) which mostly occurs in the PEB.[30][31]

The develop chemistry is delivered on a spinner, much like photoresist. Developers originally often contained sodium hydroxide (NaOH). However, sodium is considered an extremely undesirable contaminant in MOSFET fabrication because it degrades the insulating properties of gate oxides (specifically, sodium ions can migrate in and out of the gate, changing the threshold voltage of the transistor and making it harder or easier to turn the transistor on over time). Metal-ion-free developers such as tetramethylammonium hydroxide (TMAH) are now used. The temperature of the developer might be tightly controlled using jacketed (dual walled) hoses to within 0.2 °C.[6] The nozzle that coats the wafer with developer may influence the amount of developer that is necessary.[32][15]

The resulting wafer is then "hard-baked" if a non-chemically amplified resist was used, typically at 120 to 180 °C[33] for 20 to 30 minutes. The hard bake solidifies the remaining photoresist, to make a more durable protecting layer in future ion implantation, wet chemical etching, or plasma etching.

From preparation until this step, the photolithography procedure has been carried out by two machines: the photolithography stepper or scanner, and the coater/developer. The two machines are usually installed side by side, and are "linked" together.[34][27][35]

Etching, implantation

edit
Main article: Etching (microfabrication)

In etching, a liquid ("wet") or plasma ("dry") chemical agent removes the uppermost layer of the substrate in the areas that are not protected by photoresist. In semiconductor fabrication, dry etching techniques are generally used, as they can be made anisotropic, in order to avoid significant undercutting of the photoresist pattern. This is essential when the width of the features to be defined is similar to or less than the thickness of the material being etched (i.e. when the aspect ratio approaches unity). Wet etch processes are generally isotropic in nature, which is often indispensable for microelectromechanical systems, where suspended structures must be "released" from the underlying layer.

The development of low-defectivity anisotropic dry-etch process has enabled the ever-smaller features defined photolithographically in the resist to be transferred to the substrate material.

Photoresist removal

edit

After a photoresist is no longer needed, it must be removed from the substrate. This usually requires a liquid "resist stripper", which chemically alters the resist so that it no longer adheres to the substrate. Alternatively, the photoresist may be removed by a plasma containing oxygen, which oxidizes it. This process is called plasma ashing and resembles dry etching. The use of 1-Methyl-2-pyrrolidone (NMP) solvent for photoresist is another method used to remove an image. When the resist has been dissolved, the solvent can be removed by heating to 80 °C without leaving any residue.[36]

Exposure ("printing") systems

edit
 
The wafer track portion of an aligner that uses 365 nm ultraviolet light

Exposure systems typically produce an image on the wafer using a photomask. The photomask blocks light in some areas and lets it pass in others. (Maskless lithography projects a precise beam directly onto the wafer without using a mask, but it is not widely used in commercial processes.) Exposure systems may be classified by the optics that transfer the image from the mask to the wafer.

Photolithography produces better thin film transistor structures than printed electronics, due to smoother printed layers, less wavy patterns, and more accurate drain-source electrode registration.[37]

Contact and proximity

edit
Main article: Contact lithography

A contact aligner, the simplest exposure system, puts a photomask in direct contact with the wafer[38] and exposes it to a uniform light. A proximity aligner puts a small gap of around 5 microns between the photomask and wafer.[38] In both cases, the mask covers the entire wafer, and simultaneously patterns every die.

Contact printing/lithography is liable to damage both the mask and the wafer,[38] and this was the primary reason it was abandoned for high volume production. Both contact and proximity lithography require the light intensity to be uniform across an entire wafer, and the mask to align precisely to features already on the wafer. As modern processes use increasingly large wafers, these conditions become increasingly difficult.

Research and prototyping processes often use contact or proximity lithography, because it uses inexpensive hardware and can achieve high optical resolution. The resolution in proximity lithography is approximately the square root of the product of the wavelength and the gap distance. Hence, except for projection lithography (see below), contact printing offers the best resolution, because its gap distance is approximately zero (neglecting the thickness of the photoresist itself). In addition, nanoimprint lithography may revive interest in this familiar technique, especially since the cost of ownership is expected to be low; however, the shortcomings of contact printing discussed above remain as challenges.

Projection

edit
See also: Stepper

Very-large-scale integration (VLSI) lithography uses projection systems. Unlike contact or proximity masks, which cover an entire wafer, projection masks (known as "reticles") show only one die or an array of dies (known as a "field") in a portion of the wafer at a time. Projection exposure systems (steppers or scanners) project the mask onto the wafer many times, changing the position of the wafer with every projection, to create the complete pattern, fully patterning the wafer. The difference between steppers and scanners is that, during exposure, a scanner moves the photomask and the wafer simultaneously, while a stepper only moves the wafer. Contact, proximity and projection Mask aligners preceded steppers[39] [40] and do not move the photomask nor the wafer during exposure and use masks that cover the entire wafer. Immersion lithography scanners use a layer of Ultrapure water between the lens and the wafer to increase resolution. An alternative to photolithography is nanoimprint lithography. The maximum size of the image that can be projected onto a wafer is known as the reticle limit.

Photomasks

edit
Main article: Photomask

The image for the mask originates from a computerized data file. This data file is converted to a series of polygons and written onto a square of fused quartz substrate covered with a layer of chromium using a photolithographic process. A laser beam (laser writer) or a beam of electrons (e-beam writer) is used to expose the pattern defined by the data file and travels over the surface of the substrate in either a vector or raster scan manner. Where the photoresist on the mask is exposed, the chrome can be etched away, leaving a clear path for the illumination light in the stepper/scanner system to travel through.

Resolution in projection systems

edit
Main articles: Optics § Diffraction and optical resolution, Diffraction, and Optical resolution
 
The filtered fluorescent lighting, yellow LED or low-pressure sodium lighting in photolithography cleanrooms contains no ultraviolet or blue light in order to avoid exposing photoresists. The spectrum of light emitted by such fixtures gives virtually all such spaces a bright yellow color.
 
Diffraction order spectrum with partial coherence. The diffraction order spectrum (up to 3rd order) of a line-space pattern (pitch<3 wavelength/NA) is shown with different colors indicating different illumination angles in a partial coherence setting.

The ability to project a clear image of a small feature onto the wafer is limited by the wavelength of the light that is used, and the ability of the reduction lens system to capture enough diffraction orders from the illuminated mask. Current state-of-the-art photolithography tools use deep ultraviolet (DUV) light from excimer lasers with wavelengths of 248 (KrF) and 193 (ArF) nm (the dominant lithography technology today is thus also called "excimer laser lithography"), which allow minimum feature sizes down to 50 nm. Excimer laser lithography has thus played a critical role in the continued advance of the Moore's Law for the last 20 years (see below[41]).

The minimum feature size that a projection system can print is given approximately by:

 

where   is the minimum feature size (also called the critical dimension, target design rule, or "half-pitch"),   is the wavelength of light used, and   is the numerical aperture of the lens as seen from the wafer.

  (commonly called k1 factor) is a coefficient that encapsulates process-related factors and typically equals 0.4 for production. (  is actually a function of process factors such as the angle of incident light on a reticle and the incident light intensity distribution. It is fixed per process.) The minimum feature size can be reduced by decreasing this coefficient through computational lithography.

 
Illumination direction impact. On-axis illumination provides higher contrast, but only off-axis illumination resolves the smallest pitch.
 
The Rayleigh criterion defines the minimum separation for preserving the distance between two points in the projected image.

According to this equation, minimum feature sizes can be decreased by decreasing the wavelength, and increasing the numerical aperture (to achieve a tighter focused beam and a smaller spot size). However, this design method runs into a competing constraint. In modern systems, the depth of focus is also a concern:

 

Here,   is another process-related coefficient. The depth of focus restricts the thickness of the photoresist and the depth of the topography on the wafer. Chemical mechanical polishing is often used to flatten topography before high-resolution lithographic steps.

From classical optics, k1=0.61 by the Rayleigh criterion.[42] The image of two points separated by less than 1.22 wavelength/NA will not maintain that separation but will be larger due to the interference between the Airy discs of the two points. It must also be remembered, though, that the distance between two features can also change with defocus.[43]

 
Illumination can significantly impact the apparent pitch of the image of the same object (a pair of bright lines in this case).
 
Straight edges of shortened features are distorted into bowed edges as pitch is reduced in both directions.
 
Gap width vs. half-pitch. The tighter the line pitch, the wider the gap between the ends of the lines (perpendicular to the pitch).

Resolution is also nontrivial in a two-dimensional context. For example, a tighter line pitch results in wider gaps (in the perpendicular direction) between the ends of the lines.[44][45] More fundamentally, straight edges become rounded for shortened rectangular features, where both x and y pitches are near the resolution limit.[46][47][48][49]

For advanced nodes, blur, rather than wavelength, becomes the key resolution-limiting factor. Minimum pitch is given by blur sigma/0.14.[50] Blur is affected by dose[51][52][53] as well as quantum yield,[54] leading to a tradeoff with stochastic defects, in the case of EUV.[55][56][57]

Stochastic effects

edit
 
Features imaged by DUV (left) have much less edge position variability than those imaged by EUV (right).

As light consists of photons, at low doses the image quality ultimately depends on the photon number. This affects the use of extreme ultraviolet lithography or EUVL, which is limited to the use of low doses on the order of 20 photons/nm2.[58] This is due to fewer photons for the same energy dose for a shorter wavelength (higher energy per photon). With fewer photons making up the image, there is noise in the edge placement.[59]

 
Photons are divided among multiple source points. The photons making up the exposure dose are divided equally among the source points (two are shown here) which are positioned within the pupil.

The stochastic effects would become more complicated with larger pitch patterns with more diffraction orders and using more illumination source points.[60][61]

Secondary electrons in EUV lithography aggravate the stochastic characteristics.[62]

Light sources

edit
 
One of the evolutionary paths of lithography has been the use of shorter wavelengths. It is worth noting that the same light source may be used for several technology generations.

Historically, photolithography has used ultraviolet light from gas-discharge lamps using mercury, sometimes in combination with noble gases such as xenon. These lamps produce light across a broad spectrum with several strong peaks in the ultraviolet range. This spectrum is filtered to select a single spectral line. From the early 1960s through the mid-1980s, Hg lamps had been used in lithography for their spectral lines at 436 nm ("g-line"), 405 nm ("h-line") and 365 nm ("i-line"). However, with the semiconductor industry's need for both higher resolution (to produce denser and faster chips) and higher throughput (for lower costs), lamp-based lithography tools were no longer able to meet the industry's high-end requirements.

This challenge was overcome in 1982 when excimer laser lithography was proposed and demonstrated at IBM by Kanti Jain.[63][64][65][66] Excimer laser lithography machines (steppers and scanners) became the primary tools in microelectronics production, and has enabled minimum features sizes in chip manufacturing to shrink from 800 nanometers in 1990 to 7 nanometers in 2018.[67][68] From an even broader scientific and technological perspective, in the 50-year history of the laser since its first demonstration in 1960, the invention and development of excimer laser lithography has been recognized as a major milestone.[69][70][71]

The commonly used deep ultraviolet excimer lasers in lithography systems are the krypton fluoride (KrF) laser at 248 nm wavelength and the argon fluoride laser (ArF) at 193 nm wavelength. The primary manufacturers of excimer laser light sources in the 1980s were Lambda Physik (now part of Coherent, Inc.) and Lumonics. Since the mid-1990s Cymer Inc. has become the dominant supplier of excimer laser sources to the lithography equipment manufacturers, with Gigaphoton Inc. as their closest rival. Generally, an excimer laser is designed to operate with a specific gas mixture; therefore, changing wavelength is not a trivial matter, as the method of generating the new wavelength is completely different, and the absorption characteristics of materials change. For example, air begins to absorb significantly around the 193 nm wavelength; moving to sub-193 nm wavelengths would require installing vacuum pump and purge equipment on the lithography tools (a significant challenge). An inert gas atmosphere can sometimes be used as a substitute for a vacuum, to avoid the need for hard plumbing. Furthermore, insulating materials such as silicon dioxide, when exposed to photons with energy greater than the band gap, release free electrons and holes which subsequently cause adverse charging.

Optical lithography has been extended to feature sizes below 50 nm using the 193 nm ArF excimer laser and liquid immersion techniques. Also termed immersion lithography, this enables the use of optics with numerical apertures exceeding 1.0. The liquid used is typically ultra-pure, deionised water, which provides for a refractive index above that of the usual air gap between the lens and the wafer surface. The water is continually circulated to eliminate thermally-induced distortions. Water will only allow NA's of up to ~1.4, but fluids with higher refractive indices would allow the effective NA to be increased further.

 
Changing the lithography wavelength is significantly limited by absorption. Air absorbs below c. 185 nm.

Experimental tools using the 157 nm wavelength from the F2 excimer laser in a manner similar to current exposure systems have been built. These were once targeted to succeed 193 nm lithography at the 65 nm feature size node but have now all but been eliminated by the introduction of immersion lithography. This was due to persistent technical problems with the 157 nm technology and economic considerations that provided strong incentives for the continued use of 193 nm excimer laser lithography technology. High-index immersion lithography is the newest extension of 193 nm lithography to be considered. In 2006, features less than 30 nm were demonstrated by IBM using this technique.[72] These systems used CaF2 calcium fluoride lenses.[73][74] Immersion lithography at 157 nm was explored.[75]

UV excimer lasers have been demonstrated to about 126 nm (for Ar2*). Mercury arc lamps are designed to maintain a steady DC current of 50 to 150 Volts, however excimer lasers have a higher resolution. Excimer lasers are gas-based light systems that are usually filled with inert and halide gases (Kr, Ar, Xe, F and Cl) that are charged by an electric field. The higher the frequency, the greater the resolution of the image. KrF lasers are able to function at a frequency of 4 kHz . In addition to running at a higher frequency, excimer lasers are compatible with more advanced machines than mercury arc lamps are. They are also able to operate from greater distances (up to 25 meters) and are able to maintain their accuracy with a series of mirrors and antireflective-coated lenses. By setting up multiple lasers and mirrors, the amount of energy loss is minimized, also since the lenses are coated with antireflective material, the light intensity remains relatively the same from when it left the laser to when it hits the wafer.[76]

Lasers have been used to indirectly generate non-coherent extreme UV (EUV) light at 13.5 nm for extreme ultraviolet lithography. The EUV light is not emitted by the laser, but rather by a tin or xenon plasma which is excited by an excimer or CO2 laser.[77] This technique does not require a synchrotron, and EUV sources, as noted, do not produce coherent light. However vacuum systems and a number of novel technologies (including much higher EUV energies than are now produced) are needed to work with UV at the edge of the X-ray spectrum (which begins at 10 nm). As of 2020, EUV is in mass production use by leading edge foundries such as TSMC and Samsung.

Theoretically, an alternative light source for photolithography, especially if and when wavelengths continue to decrease to extreme UV or X-ray, is the free-electron laser (or one might say xaser for an X-ray device). Free-electron lasers can produce high quality beams at arbitrary wavelengths.

Visible and infrared femtosecond lasers were also applied for lithography. In that case photochemical reactions are initiated by multiphoton absorption. Usage of these light sources have a lot of benefits, including possibility to manufacture true 3D objects and process non-photosensitized (pure) glass-like materials with superb optical resiliency.[78]

Experimental methods

edit
See also: Next-generation lithography and Nanolithography

Photolithography has been defeating predictions of its demise for many years. For instance, by the early 1980s, many in the semiconductor industry had come to believe that features smaller than 1 micron could not be printed optically. Modern techniques using excimer laser lithography already print features with dimensions a fraction of the wavelength of light used – an amazing optical feat. New techniques such as immersion lithography, dual-tone resist and multiple patterning continue to improve the resolution of 193 nm lithography. Meanwhile, current research is exploring alternatives to conventional UV, such as electron beam lithography, X-ray lithography, extreme ultraviolet lithography and ion projection lithography. Extreme ultraviolet lithography has entered mass production use, as of 2018 by Samsung[79] and other manufacturers have followed suit.

Massively parallel electron beam lithography has been explored as an alternative to photolithography, and was tested by TSMC, but it did not succeed and the technology from the main developer of the technique, MAPPER, was purchased by ASML, although electron beam lithography was at one point used in chip production by IBM.[80][81] Electron beam lithography is only used in niche applications such as photomask production.[82][83][84][85][86]

Economy

edit

In 2001 NIST publication has reported that photolithography process constituted about 35% of total cost of a wafer processing costs.[87]: 11 

In 2021, the photolithography industry was valued over 8 billion USD.[88]

See also

edit

References

edit
  1. ^ Carroll, Gregory T.; Turro, Nicholas J.; Mammana, Angela; Koberstein, Jeffrey T. (2017). "Photochemical Immobilization of Polymers on a Surface: Controlling Film Thickness and Wettability". Photochemistry and Photobiology. 93 (5): 1165–1169. doi:10.1111/php.12751. ISSN 0031-8655. PMID 28295380. S2CID 32105803.
  2. ^ "DSA Re-Enters Litho Picture". March 15, 2018.
  3. ^ a b "Jay W. Lathrop | Computer History Museum". www.computerhistory.org. Retrieved 2018-06-18.
  4. ^ Willson, C. G., Dammel, R. R., and Reiser, A (1997). Tarascon-Auriol, Regine G (ed.). "Photoresist materials: a historical perspective". Advances in Resist Technology and Processing XIV. 3049: 28. Bibcode:1997SPIE.3049...28W. doi:10.1117/12.275826. S2CID 136616549.{{cite journal}}: CS1 maint: multiple names: authors list (link)
  5. ^ "Lithography".
  6. ^ a b Levinson, Harry J. (2005). Principles of Lithography. SPIE Press. ISBN 9780819456601.
  7. ^ US3122817A, Jules, Andrus, "Fabrication of semiconductor devices", issued 1964-03-03 
  8. ^ a b Stein, Eric (2018-01-01). "Fiction in the Integrated Circuit". TWU Master's Thesis: 49–50.
  9. ^ a b c d Lathrop, Jay W. (2013). "The Diamond Ordnance Fuze Laboratory's Photolithographic Approach to Microcircuits - IEEE Journals & Magazine". IEEE Annals of the History of Computing. 35: 48–55. doi:10.1109/MAHC.2011.83. S2CID 2562671.
  10. ^ a b Weightman, Gavin (2015). Eureka: How Invention Happens. Yale University Press. pp. 178–179. ISBN 978-0300192087.
  11. ^ Lécuyer, Christophe (2010). Makers of the Microchip: A Documentary History of Fairchild Semiconductor. The MIT Press. ISBN 978-0262014243.
  12. ^ Handbook of Integrated Circuit Industry. Springer. 27 November 2023. ISBN 978-981-99-2836-1.
  13. ^ Jaeger, Richard C. (2002). "Lithography". Introduction to Microelectronic Fabrication (2nd ed.). Upper Saddle River: Prentice Hall. ISBN 978-0-201-44494-0.
  14. ^ Clark, Benjamin L.; Kocsis, Michael; Greer, Michael; Grenville, Andrew; Saito, Takashi; Huli, Lior; Farrell, Richard; Hetzer, David; Hu, Shan; Matsumoto, Hiroie; Metz, Andrew; Kawakami, Shinchiro; Matsunaga, Koichi; Enomoto, Masashi; Lauerhaas, Jeffrey; Ratkovich, Anthony; Dekraker, David (2015). "Coater/Developer process integration of metal-oxide based photoresist". In Wallow, Thomas I.; Hohle, Christoph K. (eds.). Advances in Patterning Materials and Processes XXXII. Vol. 9425. pp. 355–361. doi:10.1117/12.2085982. S2CID 122169514.
  15. ^ a b c Handbook of VLSI Microlithography, 2nd Edition. Cambridge University Press. April 2001. ISBN 9780080946801.
  16. ^ Proceedings of the Seventh Symposium on Automated Integrated Circuits Manufacturing. The Electrochemical Society. 1992. ISBN 9781566770040.
  17. ^ Zhao, X-A; Kolawa, E; Nicolet, M-A (1986). "Reactions of thin metal films with crystalline and amorphous Al2O3". California Institute of Technology. 4 (6): 3139. Bibcode:1986JVSTA...4.3139Z. doi:10.1116/1.573642.
  18. ^ "Semiconductor Lithography (Photolithography) - The Basic Process".
  19. ^ Jamieson, Andrew; Dam, Thuc; Baik, Ki-Ho; Duerksen, Ken; Eidson, Elie; Akai, Keiji; Hisano, Kazuya; Kohama, Norifumi; Machidori, Shinichi (May 20, 2006). "The design and qualification of the TEL CLEAN TRACK ACTTMM photomask coating tool at Intel". In Hoga, Morihisa (ed.). Photomask and Next-Generation Lithography Mask Technology XIII. Vol. 6283. SPIE. pp. 471–478. doi:10.1117/12.681751. S2CID 110358910 – via www.spiedigitallibrary.org.
  20. ^ "S. Arscott, 'The limits of edge bead planarization and surface levelling in spin-coated liquid films', J. Micromech. Microeng. 30, 025003, (2020)". doi:10.1088/1361-6439/ab60be. hdl:20.500.12210/44092. S2CID 214580612. {{cite journal}}: Cite journal requires |journal= (help)
  21. ^ Handbook of Integrated Circuit Industry. Springer. 27 November 2023. ISBN 978-981-99-2836-1.
  22. ^ Reiter, Tamas; McCann, Michael; Connolly, James; Haughey, Sean (2022). "An Investigation of Edge Bead Removal Width Variability, Effects and Process Control in Photolithographic Manufacturing". IEEE Transactions on Semiconductor Manufacturing. 35: 60–66. doi:10.1109/TSM.2021.3129770. S2CID 244560651.
  23. ^ Wei, Yayi; Brainard, Robert (February 19, 2009). "Process Steps in the Track". Advanced Processes for 193-nm Immersion Lithography. Vol. PM189. pp. 19–52. doi:10.1117/3.820233.ch2. ISBN 978-0-8194-7557-2 – via www.spiedigitallibrary.org.
  24. ^ Wang, Yangyuan; Chi, Min-Hwa; Lou, Jesse Jen-Chung; Chen, Chun-Zhang (November 27, 2023). Handbook of Integrated Circuit Industry. Springer Nature. ISBN 978-981-99-2836-1 – via Google Books.
  25. ^ Microlithography: Science and Technology, Second Edition. CRC Press. 3 October 2018. ISBN 9781420051537.
  26. ^ Hiroi, Yoshiomi; Kishioka, Takahiro; Sakamoto, Rikimaru; Maruyama, Daisuke; Ohashi, Takuya; Ishida, Tomohisa; Kimura, Shigeo; Sakaida, Yasushi; Watanabe, Hisayuki (2007). "BARC (Bottom anti-reflective coating) for immersion process". In Lin, Qinghuang (ed.). Advances in Resist Materials and Processing Technology XXIV. Vol. 6519. pp. 731–740. doi:10.1117/12.711305. S2CID 122377285.
  27. ^ a b Wakamizu, Shinya; Kyouda, Hideharu; Nakano, Katsushi; Fujiwara, Tomoharu (2008). "193-nm immersion lithography for high volume manufacturing using novel immersion exposure tool and coater/Developer system". In Chen, Alek C.; Lin, Burn; Yen, Anthony (eds.). Lithography Asia 2008. Vol. 7140. pp. 819–826. doi:10.1117/12.804675. S2CID 109584069.
  28. ^ Wei, Yayi; Brainard, Robert L. (January 1, 2009). Advanced Processes for 193-nm Immersion Lithography. SPIE Press. ISBN 978-0-8194-7557-2 – via Google Books.
  29. ^ "Resist Development for High-NA EUV - Read more on SemiWiki". 25 February 2024.
  30. ^ Nalamasu, Omkaram; et al. "An Overview of Resist Processing for DUV Photolithography".
  31. ^ LaPedus, Mark (March 19, 2018). "EUV's New Problem Areas". Semiconductor Engineering.
  32. ^ Wang, Han; Ning, Feng; Xu, Qiang; Liu, Xue-Ping (2015). "A summary of the current development of developing technology in the field of integrated circuit manufacturing". Proceedings of the 3rd International Conference on Mechatronics, Robotics and Automation. Vol. 15. doi:10.2991/ICMRA-15.2015.256. ISBN 978-94-62520-76-9. S2CID 54991701.
  33. ^ "Techniques - lithography | Core Facilities". cores.research.asu.edu. Retrieved 2020-02-04.
  34. ^ Fujiwara, Tomoharu; Shiraishi, Kenichi; Tanizaki, Hirokazu; Ishii, Yuuki; Kyoda, Hideharu; Yamamoto, Taro; Ishida, Seiki (2006). "Wafer management between coat/Developer track and immersion lithography tool". In Flagello, Donis G. (ed.). Optical Microlithography XIX. Vol. 6154. pp. 1553–1562. doi:10.1117/12.656303. S2CID 110508653.
  35. ^ Advanced Processes for 193-nm Immersion Lithography. SPIE Press. 2009. ISBN 9780819475572.
  36. ^ "AN-Methyl-2-Pyrrolidone" (PDF).
  37. ^ Noh, Jinsoo; Jung, Minhoon; Jung, Younsu; Yeom, Chisun; Pyo, Myoungho; Cho, Gyoujin (April 2015). "Key Issues With Printed Flexible Thin Film Transistors and Their Application in Disposable RF Sensors". Proceedings of the IEEE. 103 (4): 554–566. doi:10.1109/JPROC.2015.2410303. ISSN 0018-9219.
  38. ^ a b c "Canon PLA 501F/FA Proximity Aligner".
  39. ^ "GCA Mann 4800 Direct Step on Wafer". Chip History. Retrieved 2023-12-30.
  40. ^ "Perkin-Elmer Series 100 Projection Scanning Aligners".
  41. ^ La Fontaine, B., "Lasers and Moore's Law", SPIE Professional, Oct. 2010, p. 20; http://spie.org/x42152.xml
  42. ^ "Lithography Resolution Limits: Paired Features".
  43. ^ "Impact of Defocus and Illumination on Imaging of Pitch".
  44. ^ "How Line Cuts Became Necessary".
  45. ^ M. Eurlings et al., Proc. SPIE 4404, 266 (2001).
  46. ^ "1D vs 2D Patterning Limits in Advanced Lithography". YouTube. 29 August 2021.
  47. ^ "Vanishing of Half the Fourier Coefficients in Staggered Arrays". YouTube. 10 October 2021.
  48. ^ "Pitch Walking From Corner Rounding in Lithography". 31 March 2022 – via www.youtube.com.
  49. ^ E. S. Wu et al., J. Microlith., Microfab., Microsyst. 4, 023009 (2005).
  50. ^ "Blur not Wavelength Determines Resolution at Advanced Nodes".
  51. ^ A. Narasimhan et al., Proc. SPIE 9422, 942208 (2015).
  52. ^ P. de Schepper et al., Proc. SPIE 9425, 942507 (2015).
  53. ^ Ma, J. H.; Naulleau, P.; Ahmed, M.; Kostko, O. (2020). "Determination of effective attenuation length of slow electrons in polymer films". Journal of Applied Physics. 127 (24): 245301. Bibcode:2020JAP...127x5301M. doi:10.1063/5.0007163. OSTI 1782149. S2CID 221935438.
  54. ^ "Resolution, LER, and Sensitivity Limitations of Photoresist" (PDF).
  55. ^ P. De Bisschop and E. Hendrickx, Proc. SPIE 10583, 105831K (2018).
  56. ^ "Revisiting EUV Lithography: Post-Blur Stochastic Distributions".
  57. ^ A. De Silva et al., Proc. SPIE 10957, 109570F (2019).
  58. ^ "The Stochastic Behavior of Optical Images and Its Impact on Resolution". www.linkedin.com.
  59. ^ "Stochastic Origins of EUV Feature Edge Roughness".
  60. ^ "The Need for Low Pupil Fill in EUV Lithography". 7 August 2023.
  61. ^ "The Stochastic Variation of EUV Source Illumination".
  62. ^ "Stochastic Characteristics of DUV vs. EUV Lithography". 17 September 2023 – via www.youtube.com.
  63. ^ Jain, K. "Excimer Laser Lithography", SPIE Press, Bellingham, WA, 1990.
  64. ^ Jain, K. et al., "Ultrafast deep-UV lithography with excimer lasers", IEEE Electron Device Lett., Vol. EDL-3, 53 (1982): https://ieeexplore.ieee.org/document/1482581/;jsessionid=66FBB98827D6C47335DB6E9D31D6000E?arnumber=1482581
  65. ^ Lin, B. J., "Optical Lithography", SPIE Press, Bellingham, WA, 2009, p. 136.
  66. ^ Basting, D., et al., "Historical Review of Excimer Laser Development," in "Excimer Laser Technology", D. Basting and G. Marowsky, Eds., Springer, 2005.
  67. ^ "Samsung Starts Industry's First Mass Production of System-on-Chip with 10-Nanometer FinFET Technology". October 17, 2016.
  68. ^ "TSMC Kicks Off Volume Production of 7nm Chips". AnandTech. 2018-04-28. Retrieved 2018-10-20.
  69. ^ American Physical Society / Lasers / History / Timeline; http://www.laserfest.org/lasers/history/timeline.cfm
  70. ^ SPIE / Advancing the Laser / 50 Years and into the Future; http://spie.org/Documents/AboutSPIE/SPIE%20Laser%20Luminaries.pdf
  71. ^ U.K. Engineering & Physical Sciences Research Council / Lasers in Our Lives / 50 Years of Impact; "Archived copy" (PDF). Archived from the original (PDF) on 2011-09-13. Retrieved 2011-08-22.{{cite web}}: CS1 maint: archived copy as title (link)
  72. ^ Hand, Aaron. "High-Index Lenses Push Immersion Beyond 32 nm". Archived from the original on 2015-09-29.
  73. ^ "MICROELECTRONICS PROCESSING - Lithography at 157 nm gains momentum". August 1999.
  74. ^ Itani, Toshiro; Wakamiya, Wataru; Cashmore, Julian; Gower, Malcolm (2003). "157-nm lithography with high numerical aperture lens for sub-70 nm node". Microelectronic Engineering. 67–68: 39–46. doi:10.1016/S0167-9317(03)00057-1.
  75. ^ https://pubs.aip.org/avs/jvb/article-abstract/19/6/2353/1073785/Immersion-lithography-at-157-nm?redirectedFrom=fulltext [bare URL]
  76. ^ Martini, Matteo. "Light Sources Used in Photolithography". Archived from the original on 2014-10-29. Retrieved 2014-10-28.
  77. ^ "StackPath". 29 August 2019.
  78. ^ Jonušauskas, Linas; Gailevičius, Darius; Mikoliūnaitė, Lina; Sakalauskas, Danas; Šakirzanovas, Simas; Juodkazis, Saulius; Malinauskas, Mangirdas (2017-01-02). "Optically Clear and Resilient Free-Form μ-Optics 3D-Printed via Ultrafast Laser Lithography". Materials. 10 (1): 12. Bibcode:2017Mate...10...12J. doi:10.3390/ma10010012. PMC 5344581. PMID 28772389.
  79. ^ "Samsung Elec becomes world's 1st to use EUV at 7nm process - Pulse by Maeil Business News Korea".
  80. ^ "Maskless Lithography: A recurring dream".
  81. ^ Pfeiffer, Hans C. (2010). Montgomery, M. Warren; Maurer, Wilhelm (eds.). "Direct write electron beam lithography: A historical overview". Photomask Technology 2010. 7823. Bibcode:2010SPIE.7823E..16P. doi:10.1117/12.868477. S2CID 108646584.
  82. ^ "MAPPER: High Throughput Maskless Lithography". January 2009. pp. 1–5.
  83. ^ https://www.cea.fr/cea-tech/leti/english/Documents/Spie-Litho/03%20-%20ML2%20-%20MAPPER%20-%20M%20Wieland%20-%20LETI%20WS%20SPIE%202018.pdf [bare URL PDF]
  84. ^ "Manufacturing Bits: Feb. 5". 5 February 2019.
  85. ^ "Leti receives Mapper 300-mm e-beam lithography platform". 21 July 2009.
  86. ^ "MAPPER and TSMC Take Next Step in Exploring Multiple E-beam Lithography for IC Manufacturing at 22 nanometer node and Beyond".
  87. ^ "Office of microelectronics programs: programs, activities, and accomplishments" (PDF). National Bureau of Standards: Electronics and Electrical Engineering Laboratory. Archived from the original (PDF) on July 23, 2020. Alt URL
  88. ^ "Photolithography Market: Global Industry Analysis and Forecast (2021-2029)". MAXIMIZE MARKET RESEARCH. Retrieved 2023-03-14.
edit
 
Look up photolithography in Wiktionary, the free dictionary.
Retrieved from "https://en.wikipedia.org/w/index.php?title=Photolithography&oldid=1245279554"