A serial computer is a computer typified by bit-serial architecture – i.e., internally operating on one bit or digit for each clock cycle. Machines with serial main storage devices such as acoustic or magnetostrictive delay lines and rotating magnetic devices were usually serial computers.
Serial computers require much less hardware than their bit-parallel counterparts[1] which exploit bit-level parallelism to do more computation per clock cycle. There are modern variants of the serial computer available as a soft microprocessor[2] which can serve niche purposes where size of the CPU is the main constraint.
The first computer that was not serial and used a parallel bus was the Whirlwind in 1951.
A serial computer is not necessarily the same as a computer with a 1-bit architecture, which is a subset of the serial computer class. 1-bit computer instructions operate on data consisting of single bits, whereas a serial computer can operate on N-bit data widths, but does so a single bit at a time.
Serial machines
edit- EDVAC (1949)
- BINAC (1949)
- SEAC (1950)
- UNIVAC I (1951)
- Elliott Brothers Elliott 152[citation needed] (1954)
- Bendix G-15 (1956)
- LGP-30 (1956)[3]
- Elliott Brothers Elliott 803 (1958)
- ZEBRA[citation needed] (1958)
- D-17B guidance computer (1962)
- PDP-8/S[4] (1966)
- General Electric GE-PAC 4040 process control computer
- F14 CADC (1970) – transferred all data serially, but internally operated on many bits in parallel[5]
- Kenbak-1 (1971)
- Datapoint 2200 (1971)[6]
- HP-35 (1972)[7]
- Digit-serial HP Saturn-based calculators[8] from the HP-71B (1974) to the HP 50g (2006–2015)
- National Semiconductor SC/MP (1976)
- Ferranti F100-L (1977) – 16-bit, but uses a bit-serial arithmetic logic unit
Massively parallel
editMost of the early massive parallel processing machines were built out of individual serial processors, including:
- ICL Distributed Array Processor (1979)
- Goodyear MPP (1983)
- Connection Machine CM-1 (1985)
- Connection Machine CM-2 (1987)
- MasPar MP-1 (1990) – 32-bit architecture, internally processed 4 bits at a time[9]
- VIRAM1 computational RAM (2003)
See also
editReferences
edit- ^ Wilkes, Maurice Vincent (1956). Automatic digital computers. Methuen Publishing Ltd / John Wiley & Sons, Inc. Retrieved 2012-06-06.
- ^ Howe, Richard James (2020) [2019-06-27]. "Bit-Serial: A bit-serial CPU written in VHDL, with a simulator written in C." Github Project: A Bit Serial CPU. Archived from the original on 2022-06-15. Retrieved 2019-06-28.
- ^ Miller, Raymond E. (1965). Switching Theory – Volume 1: Combinational Circuits. Vol. 1 (Second printing, March 1966, of 1st ed.). John Wiley & Sons, Inc. pp. 44–47. LCCN 65-14249.
- ^ Nineteen Fifty-Seven to the Present (PDF) (6 ed.). Maynard, Massachusetts, USA: Digital Equipment Corporation. 1978 [1972]. p. 7. Archived (PDF) from the original on 2022-03-02. Retrieved 2021-02-06. (1+viii+87+3 pages)
- ^ Holt, Raymond M. (1971). This paper describes the architecture of the CPU and Memory for the Central Air Data Computer (CADC) System used in the Grumman/Navy F14A carrier-based fighter aircraft (PDF). pp. 5, 7. AP1-26-97. Archived from the original (PDF) on 2017-11-04. Retrieved 2017-11-04.
[…] the processor was designed to transfer data serially throughout the entire system. […] The Parallel Multiplier Unit […] by means of a parallel algorithm […]
(26 pages) - ^ Shirriff, Ken (May 2015). "The Texas Instruments TMX 1795: the (almost) first, forgotten microprocessor". Archived from the original on 2022-06-15. Retrieved 2020-05-29.
Even operating one bit at a time as a serial computer, the Datapoint 2200 performed considerably faster than the 8008 chip.
- ^ Whitney, Thomas M. (1975). "Part I. Basic Computer Architecture. / Chapter 3. Introduction to Calculators: / 3-5. Example Systems / The Hewlett Packard HP-35". In Stone, Harold Stuart (ed.). Introduction to Computer Architecture. Computer Sciences Series (1 ed.). Science Research Associates, Inc. (SRA). pp. 118–135 [123–135]. ISBN 0-574-18405-8. LCCN 75-14016. ark:/13960/t8pc40t3q. Order-Code 13-4005. Retrieved 2023-09-29. p. 124:
[…] The HP-35 is a totally serial computer. The adder is a BCD serial type […] The serial structure means less integrated circuit area must be allocated to interconnection lines and gating functions and an interesting trade off occurs. A bit-serial, digit-serial architecture is inherently one fourth the speed of a bit-parallel digit-serial structure […] But the basic clock rate for a bit-serial structure can sometimes be increased since additional area can be allocated for larger integrated devices that are necessary for greater speed. In the HP-35, the execution time of the most complex functions is under one second, while the serial architecture permits an increased circuit complexity. […] Instructions in the HP-35 are transferred serially from the active read-only memory to the arithmetic and control circuits and to other ROMs if present. […]
- ^ Smith, Eric L. "Brouhaha" (2023-08-09). "HP-15C CE woes: 1 bug, 2 limitations, 3 questions". MoHPC - The Museum of HP Calculators. Archived from the original on 2023-08-10. Retrieved 2023-09-24.
- ^ Culver, John (2014-09-05). "MasPar: Massively Parallel Computers – 32 cores on a chip". Archived from the original on 2022-06-15. Retrieved 2022-06-15.
Further reading
edit- Hartley, Richard I.; Parhi, Keshab K. (1995). Digit-Serial Computation. The Kluwer International Series in Engineering and Computer Science (1 ed.). Norwell, Massachusetts, USA: Kluwer Academic Publishers. ISBN 0-7923-9573-5. SECS316. (xiv+306 pages)
- Parhi, Keshab K. (April 1991). "A Systematic Approach for Design of Digit-Serial Signal Processing Architectures". IEEE Transactions on Circuits and Systems. 38 (4): 358–375. doi:10.1109/31.75394. (8 pages)