Wikipedia

Teardrop (electronics)

(Redirected from Trace necking)

A teardrop is typically drop-shaped feature on a printed circuit board and can be found on the junction of vias or contact pads.

Teardrops and trace necking as seen in a PCB layout design tool
Teardrop vias on printed circuit boards

Purpose

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The main purpose of teardrops is to enhance structural integrity in presence of thermal or mechanical stresses,[1][2][3] for example due to vibration or flexing.[4] Structural integrity may be compromised, e.g., by misalignment during drilling, so that too much copper may be removed by the drill hole in the area where a trace connects to the pad or via.[2][3][5] An extra advantage is the enlarging of manufacturing tolerances, making manufacturing easier and cheaper.[3]

Shape

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While a typical shape of a teardrop is straight-line tapering, they may be concave.[2] This type of teardrop is also called filleting or straight.[3] To produce a snowman-shaped teardrop, a secondary pad of smaller size is added at the junction overlapping with the primary pad (hence the nickname).[3][6]

Necking

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See also: Necking (engineering)

For similar reasons, a technique called trace necking reduces (or necks down[7][8][9]) the width of a trace that approaches a narrower pad of a surface-mounted device or a through-hole with a diameter that is less than the width of the trace, or when the trace passes through bottlenecks (for example, between the pads of a component).[8][9][10][11]

References

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  1. ^ Wahby, Mahmoud (2014-02-21). "Component placement tips and strategies". EDN Network. Archived from the original on 2017-09-24. Retrieved 2017-09-24.
  2. ^ a b c Loughhead, Phil (2017-05-30). "Removing Unused Pads and Adding Teardrops". Altium Designer technical documentation. Altium. Archived from the original on 2017-09-24. Retrieved 2017-09-24.
  3. ^ a b c d e Kolath, Amos (2010). "Why Where When and how teardrops should be added to PCB?". KaiZen Technologies. Archived from the original on 2017-09-24. Retrieved 2017-09-24.
  4. ^ Ruth (2023-04-28). "Introduction to high speed PCB and is it same as high frequency PCB". IBE Electronics. Retrieved 2023-05-01.
  5. ^ Lobner, Wilhelm (October 2002). "Empfehlung zu Tear-drops" [Recommendations for tear-drops] (PDF) (in German). AT&S AG. Archived (PDF) from the original on 2017-09-24. Retrieved 2017-09-24.
  6. ^ Gutierrez, Keith G.; Coates, Keven (June 2010). "PCB Design Guidelines for 0.5mm Package-on-Package Applications Processor, Part I" (PDF). Texas Instruments. Application Report SPRABB3. Archived (PDF) from the original on 2017-09-24. Retrieved 2015-07-27.
  7. ^ Loughhead, Phil (2017-04-25). "Interactive Routing". Altium Designer technical documentation. Altium. Archived from the original on 2017-09-24. Retrieved 2017-09-24.
  8. ^ a b Byers, T. J. (1991-08-01). Printed Circuit Board Design with Microcomputers (1 ed.). McGraw-Hill Book Company. p. 102. ISBN 0070095582. LCCN 91-72187.
  9. ^ a b Kollipara, Ravindranath; Tripathi, Vijai K.; Sergent, Jerry E.; Blackwell, Glenn R.; White, Donald; Staszak, Zbigniew J. (2005). "11.1.3 Packaging Electronic Systems - Design of Printed Wiring Boards" (PDF). In Whitaker, Jerry C.; Dorf, Richard C. (eds.). The Electronics Handbook (2 ed.). CRC Press. p. 1266. ISBN 978-0-8493-1889-4. LCCN 2004057106. Archived (PDF) from the original on 2017-09-25. Retrieved 2017-09-25.
  10. ^ US 3560256, Abrams, Halle, "Packaging Electronic Systems", published 1971-02-02, assigned to Western Electric Co. 
  11. ^ Thierauf, Stephen C. (2004). High-Speed Circuit Board Signal Integrity (1 ed.). Artech House, Inc. pp. 104–105. ISBN 1580531318.
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