Wikipedia

ARM Cortex-X4

The ARM Cortex-X4 is a high-performance CPU core from Arm, released in 2023[1] as part of Arm's "total compute solution".[2] It serves as the successor of ARM Cortex-X3.[3]

ARM Cortex-X4
General information
Launched2023
Designed byARM Ltd.
Performance
Address width40-bit
Cache
L1 cache128 KiB
(64 KiB I-cache with parity,
64 KiB D-cache) per core
L2 cache512–2048 KiB per core
L3 cache512 KiB – 32 MiB (optional)
Architecture and classification
MicroarchitectureARM Cortex-X4
Instruction setARMv9.2-A
Physical specifications
Cores
  • 1–10 (per cluster)
Products, models, variants
Product code name
  • "Hunter ELP"
Variant
History
PredecessorARM Cortex-X3
SuccessorARM Cortex-X925

X-series CPU cores generally focus on high performance, and can be grouped with other ARM cores, such as ARM Cortex-A720 or/and ARM Cortex-A520 in a System-on-Chip (SoC).[4][5]

Architecture changes in comparison with ARM Cortex-X3

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The processor implements the following changes:[3][4][5]

  • ARMv9.2
  • micro-op (MOP) cache removed (previously 1.5k entries)
  • Decode width: 10
  • Rename / Dispatch width: 10 (increased from 8)
  • Reorder buffer (ROB): 384 entries (increased from 320)
  • Execution ports: 21 (increased from 15)
  • Pipeline length: 10 (increased from 9)
  • Up to 2 MiB of private L2 cache (increased from 1 MiB)
  • DSU-120
    • Up to 14 cores (up from 12 cores)
    • Up to 32 MiB of shared L3 cache (increased from 16 MiB)

Performance claims:

  • 15% peak performance improvement over the Cortex-X3 in smartphones
(3.4GHz, 2MB L2, 8MB L3).[5]
  • 13% IPC uplift over the Cortex-X3, when based on the same process, clock speed,
and L3 cache (but 2 MiB L2 vs 1 MiB L2) setup (also known as ISO-process).[5]

Architecture comparison

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"Prime" core
uArch Cortex-A78 Cortex-X1 Cortex-X2 Cortex-X3 Cortex-X4 Cortex-X925 Cortex-X930
Code name Hercules Hera Matterhorn-ELP Makalu-ELP Hunter-ELP Blackhawk Travis
Architecture ARMv8.2 ARMv9 ARMv9.2
Peak clock speed ~3.0 GHz ~3.3 GHz ~3.4 GHz ~3.8 GHz ~4.2 GHz
Decode width 4 5 6 10[6] 10
Dispatch 6/cycle 8/cycle 10/cycle
Max in-flight 2x 160 2x 224 2x 288 2x 320 2x 384 2x 768
L0 (Mops entries) 1536[7] 3072[7] 1536 0[6]
L1-I + L1-D 32+32 KiB 64+64 KiB 64+64 KiB 64+64 KiB
L2 128–512 KiB 0.25–1 MiB 0.5–2 MiB 2–3 MiB
L3 0–8 MiB[8] 0–16 MiB 0–32 MiB

Usage

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See also

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References

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  1. ^ "Arm Total Compute Solution 2023 targets premium smartphones". embedded.com. 2023-06-02. Retrieved 2024-01-17.
  2. ^ "TCS23: The complete platform for consumer computing - Arm Community". community.arm.com. 2023-05-29. Retrieved 2023-09-16.
  3. ^ a b "Arm introduces the Cortex-X4, its newest flagship performance core". WikiChip Fuse. 2023-05-28. Retrieved 2023-05-30.
  4. ^ a b "Arm Cortex-X4 advances frontiers of CPU performance - Arm Community". community.arm.com. 2023-05-29. Retrieved 2023-09-16.
  5. ^ a b c d "Arm Unveils 2023 Mobile CPU Core Designs: Cortex-X4, A720, and A520 - the Armv9.2 Family". www.anandtech.com. Retrieved 2023-05-30.
  6. ^ a b "Arm Cortex-X4, A720, and A520: 2024 smartphone CPUs deep dive". Android Authority. 2023-05-29. Retrieved 2023-06-01.
  7. ^ a b "Arm's New Cortex-A78 and Cortex-X1 Microarchitectures: An Efficiency and Performance Divergence". www.anandtech.com. Retrieved 2023-06-01.
  8. ^ Schor, David (2020-05-26). "Arm Cortex-X1: The First From The Cortex-X Custom Program". WikiChip Fuse. Retrieved 2023-05-30.
  9. ^ "Latest Pixel 9 leak gives us a look at the Tensor G4 specs and benchmarks". Android Authority. 2024-06-01. Retrieved 2024-06-01.
  10. ^ "MediaTek says its Snapdragon 8 Gen 3 rival will be a beast (Updated)". Android Authority. 2023-05-29. Retrieved 2023-09-16.
  11. ^ "Qualcomm Snapdragon Tech Summit Live Blog: Compute Spotlight". Android Authority. 2023-05-29. Retrieved 2023-09-16.
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