• Comment: There is a lot of material that should be removed/improved:
    1. The current career section is just his funding, not relevant (WP:MILL)
    2. No sources for his education
    3. Relevance of the papers and parents is unclear.
    Please focus on notability, WP:NPROF, and ask questions if you are unclear. Ldm1954 (talk) 12:11, 30 October 2024 (UTC)
  • Comment: Only the 'Patients' (presumably Patents?) section is referenced. DoubleGrazing (talk) 15:42, 8 October 2024 (UTC)


Professor John Goodacre (also known as Anthony Goodacre) was born in 19th August 1964 and is a Professor of Computer Architectures and Technologist at University of Manchester.[1] [2]

Goodacre is also presently Challenge Director of UK Research and Innovation's Digital Security by Design Challenge.[3]

Education

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Goodacre completed a Computer Science B.Sc. Hons at University of York and a Trade Apprenticeship in Instrumentation and Control at Imperial Chemical Industries (I.C.I.). His work included both joint and independent projects within their research and development group covering digital electronics and computerized data capture and analysis.

Career

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Goodacre's work has been supported by Arm Holdings Ltd., and various UK government agencies, whereby he has been an advisor and contributor for the Department for Science, Innovation and Technology on the UK National Semiconductor Strategy and the EU Commission on the DG Connect Advisory Forum 2016-2017[4]

He has also various academic industrial collaborations and engagements with Huawei, Micron, Xilinx, and Synopsys in the execution of a broad research into high performance, security, low power, computer architectures and systems.

Recently Goodacre has been working along side BEIS and representing Innovate UK across UK Research and Innovation on the Integrated digital security vision across Government, including the development of the Integrated Review, UK Innovation Strategy, National Cyber Strategy’22. Goodacre had grown the Government investment by £26M, and industry co-investment to £220M for the Digital Security by Design Challenge a UK Government initiative setup to address a market failure in hardware computing that would address blocking up to 70% of the vulnerabilities.

Publications

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  • Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation [5] 2024 | Journal article, IEEE Transactions on Reliability
  • Quff: A Dynamically Typed Hybrid Quantum-Classical Programming Language [6] 2024-09-13 | Conference paper -
  • Understanding the Impact of Arbitration in MZI-Based Beneš Switching Fabrics [7] 2024-02 | Journal article - IEEE Transactions on Parallel and Distributed Systems -
  • Energy Efficient Power-Management for Out-of-Order Processors Using Cyclic Power-Gating [8] 2021 | Book chapter
  • The Birth of Arm Multicore Processing [9] - IEEE Micro

Patents

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  • 2021 GB2574800B, A system and method for bridging computer resources https://patents.google.com/patent/GB2574800B/[1] https://patents.google.com/patent/GB2574800B/[10]
  • 2018 GB2571297A, Computing Element https://patents.google.com/patent/GB2571297A[11]
  • 2017 GB2565310A, 3D Interconnected Die Stack (Spintronics) https://patents.google.com/patent/GB2565310A/en[12]
  • 2017 GB1712579.0, MEMORY CONTROL FOR ELECTRONIC DATA PROCESSING SYSTEM https://patents.google.com/patent/WO2019025814A1[13]
  • 2016   US16340062, Hyperscale Server Architecture https://patents.google.com/patent/US20190294583A1[14]
  • 2015   US20150347052, Virtualisation supporting guest operating systems using memory protection units https://www.google.co.uk/patents/US20150347052[15]
  • 2009   US20030106022, Outputting dynamic local content on mobile devices https://www.google.co.uk/patents/US20030106022  [16]
  • 2005    US20050005073, POWER CONTROL IN COHERENT MULTIPROCESSING SYSTEM   http://www.google.co.uk/patents/US20050005073  [17]
  • 2005       US20050010728, Multi-processing system with coherent and non-coherent modes    https://www.google.co.uk/patents/US7549024  [18]
  • 1998       US5822416, System and method for real-time screening and routing of telephone calls https://www.google.co.uk/patents/US5822416[19]
  • First phone that shipped dynamic content patent: https://www.gsmarena.com/sony_cmd_z5-pictures-133.php[20]

References

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  1. ^ "Professor John Goodacre". ORCID. 2023-12-10. Archived from the original on 2023-12-10. Retrieved 2023-12-10.
  2. ^ "Prof. John Goodacre – ISMG.Studio". Retrieved 2024-10-28.
  3. ^ "John Goodacre". Infosecurity Magazine. 27 September 2022. Retrieved 2024-10-23.
  4. ^ "Professor John Goodacre". Euroexa. 2019-08-05. Retrieved 2019-08-05.
  5. ^ Agiakatsikas, Dimitris; Foutris, Nikos; Sari, Aitzan; Vlagkoulis, Vasileios; Souvatzoglou, Ioanna; Psarakis, Mihalis; Ye, Ruiqi; Goodacre, John; Luján, Mikel; Kastriotou, Maria; Cazzaniga, Carlo; Frost, Chris (March 2024). "Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation". IEEE Transactions on Reliability. 73 (1): 771–783. doi:10.1109/TR.2023.3312548. ISSN 0018-9529.
  6. ^ Wright, Christopher John; Luján, Mikel; Petoumenos, Pavlos; Goodacre, John (2024-09-13). "Quff: A Dynamically Typed Hybrid Quantum-Classical Programming Language". Proceedings of the 21st ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes. MPLR 2024. New York, NY, USA: Association for Computing Machinery. pp. 65–81. doi:10.1145/3679007.3685063. ISBN 979-8-4007-1118-3.
  7. ^ Navaridas, Javier; Kynigos, Markos; Pascual, Jose A.; Luján, Mikel; Miguel-Alonso, Jose; Goodacre, John (February 2024). "Understanding the Impact of Arbitration in MZI-Based Beneš Switching Fabrics". IEEE Transactions on Parallel and Distributed Systems. 35 (2): 338–348. doi:10.1109/TPDS.2023.3336703. ISSN 1045-9219.
  8. ^ Toms, William; Goodacre, John; Luján, Mikel (2021). "Energy Efficient Power-Management for Out-of-Order Processors Using Cyclic Power-Gating". In Hochberger, Christian; Bauer, Lars; Pionteck, Thilo (eds.). Architecture of Computing Systems. Lecture Notes in Computer Science. Vol. 12800. Cham: Springer International Publishing. pp. 183–198. doi:10.1007/978-3-030-81682-7_12. ISBN 978-3-030-81682-7.
  9. ^ Goodacre, John (2021-11-01). "The Birth of Arm Multicore Processing". IEEE Micro. 41 (6): 150–152. doi:10.1109/MM.2021.3115613. ISSN 0272-1732.
  10. ^ GB2574800B, Giampietro, Tecchiolli & Anthony, John Goodacre, "A system and method for bridging computer resources", issued 2021-01-06 
  11. ^ GB2571297A, Giampietro, Tecchiolli & Anthony, John Goodacre, "Computing element", issued 2019-08-28 
  12. ^ GB2565310A, Anthony, John Goodacre, "3D interconnected die stack", issued 2019-02-13 
  13. ^ WO2019025814A1, GOODACRE, John & Tecchiolli, Giampietro, "Memory control for electronic data processing system", issued 2019-02-07 
  14. ^ US20190294583A1, GOODACRE, John & Tecchiolli, Giampietro, "Hyperscale architecture", issued 2019-09-26 
  15. ^ US20150347052A1, Grisenthwaite, Richard Roy; Craske, Simon John & Goodacre, Anthony John, "Virtualisation supporting guest operating systems using memory protection units", issued 2015-12-03 
  16. ^ US20030106022A1, Goodacre, Anthony; Merrick, Barry & Hitchman, David, "Outputting dynamic local content on mobile devices", issued 2003-06-05 
  17. ^ US20050005073A1, Pruvost, Julie-Anne; Piry, Frederic & Lataille, Norbert et al., "Power control within a coherent multi-processing system", issued 2005-01-06 
  18. ^ US7549024B2, Piry, Fredric Claude Marie & Goodacre, Anthony John, "Multi-processing system with coherent and non-coherent modes", issued 2009-06-16 
  19. ^ US5822416A, Goodacre, Anthony John & Prisock, John Hoyt, "System and method for real-time screening and routing of telephone calls", issued 1998-10-13 
  20. ^ "Sony CMD Z5 pictures, official photos". www.gsmarena.com. Retrieved 2024-10-08.