Talk:Delay calculation

The most accurate wire delay estimation continues to be topology aware simulators, which are slightly more accurate than SPICE because they directly compute the next circuit state with techniques like backwards trapezoid, rather than estimating the next state to within a specified accuracy. With direct computation, the next state errors are simply due to the accuracy of the FPU, and the simulation technique, such as backwards-trapezoid. Such simulators are also faster than AWE in every test to date, and are capable of simulating RCL circuits with loops and multiple drivers, while taking into account non-linear effects of the driver and capacitive loads.

Hi! The claim 'more accurate than SPICE' needs independent verification. SPICE has spent a lot of work on accuracy, using higher order integration methods, many techniques of error control, and careful treatment of numeric issues. It's of course still possibl e that some other method is better yet, but this would need to be shown in some independent test before adding it to an encyclopedia article. LouScheffer (talk) 12:29, 27 September 2010 (UTC)

Hi. Full disclosure: I am the author and inventor of the algorithm in patent 5675502. I agree that independent verification is needed for my claim that it's faster than AWE, as different implementations run at different speeds. However, only independent review of the actual algorithm is required to verify the accuracy claim, as this is an inherent property of the algorithm. In particular, many SPICE simulators, including H-Spice, use backwards trapezoid by default, just as the algorithm I've implemented does. The primary component of inaccuracy in SPICE, other than step-size, is due to a user-controllable accuracy per step. To avoid numerical instability due to stiff systems, SPICE uses backward stepping, which means it must guess the future values, and verify them by taking a backwards step. The error in the backwards step is used to choose a more accurate future point, and the process is repeated until the desired accuracy is reached. With topology aware simulation, the future point is directly computed, with only FPU resolution errors in the result.

To verify my accuracy claim, co-workers simulated an R-C low-pass filter since the exact solution can be mathematically derived, and they compared H-Spice and topology aware simulation to the exact solution. With default simulation parameters, H-Spice achieved less than 2% accuracy, while direct topology aware simulation achieved 0.01% accuracy, using a step-size of 1/100th of the time constant in both simulators. No set of user-supplied parameters to H-Spice was able to achieve this accuracy without decreasing the step size.

Note that the patent will expire soon, and that in any case it covers only a very small part of the solution space and is a very weak patent as a result. These ideas are quite old, and are well documented in a text book from the 1950's, which invalidates any strong patent possibilities (This text book is in the Berkeley Bechtel Engineering library, but I forget the title). So, I'm not advocating that people license this technology. I'm simply pointing out that this delay page is nearly 20 years out of date as to the state of the art in interconnect delay estimation. Topology-aware simulators are in use at two companies today, and enables highly accurate delay estimation of partially gridded clock networks, and support simulation of a non-linear driver as well as non-linear capacitors.

If I sound a bit defensive about this topic, it's because I tried to publish this in the early 1990's, but I believe Professor Pillage succeeded in suppressing it. The basic algorithm is very well described in the patent. It has been used on thousands of designs for nearly 20 years. However, the claim that "Spice is the most accurate" is wrong. I'll go further and claim that every other technique listed on the delay calculation page are less accurate, and all but SPICE are less flexible, and AWE is slower. WaywardGeek (talk) 15:59, 27 September 2010 (UTC)

I don't doubt your experiments, but there is a big difference between "More accurate than SPICE, using the default parameters", and "more accurate than SPICE". The default SPICE parameters are a big compromise, since users have a wide variety of circuits from Power to RF, and a wide variety of simulations, DC, transient, etc. Very few people (and no knowledgable ones) who are concerned about accuracy would use the defaults. LouScheffer (talk) 18:52, 27 September 2010 (UTC)

Fair enough. "Spice-like" accuracy is fine. WaywardGeek (talk) 23:51, 27 September 2010 (UTC)