Talk:Graphics Core Next

Fiji is GCN3 (aka GCN1.2)

Stop adding fictitious "GCN 1.3" which does not yet exist. Analyze tool in AMD CodeXL 1.7 has Fiji at GCN3, the same as Tonga, Iceland and Carrizo (screenshot). --92.242.59.6 (talk) 10:04, 22 June 2015 (UTC)

Thanks for that! Wouldn't you like to work on the article AMD CodeXL? Maybe add screenshot? User:ScotXW^t@lk 13:20, 10 August 2015 (UTC)

Generation vs. Iteration

THe changes between the versions are rather small, I'd rather call them Iterations then Generations. User:ScotXW^t@lk 13:20, 10 August 2015 (UTC)

AMD marketing

Sadly the people working in AMD/ATI marketing seem to e very incapable/inconsiderate:

• While the code-names "TeraScale" and "Graphics Core Next" are available, they are not consequently being used overall:
  • the LLVM back-end has been renamed from r600/si (for southern islands) into http://llvm.org/docs/AMDGPUUsage.html
  • marketing does not consequently differnetiate between GCN1.0, 1.1 and 1.2 though, at least the Direct3D 12 support does differ
  • GCN 1.0: http://developer.amd.com/wordpress/media/2012/12/AMD_Southern_Islands_Instruction_Set_Architecture.pdf
  • GCN 1.1: http://developer.amd.com/wordpress/media/2013/07/AMD_Sea_Islands_Instruction_Set_Architecture.pdf
  • GCN 1.2: http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/07/AMD_GCN3_Instruction_Set_Architecture.pdf
  • User:ScotXW^t@lk 10:38, 15 September 2015 (UTC)

What is Graphics Core Next?

AFAIK "Graphics Core Next" is a name for an instruction set as well as several iteration of microarchitectures implementing this instruction set. This is the 3D engine/shader processors. User:ScotXW^t@lk 11:22, 15 September 2015 (UTC)

What is Graphics Core Next not?

AFAIK "Graphics Core Next" has nothing to do with the numerous additionl ASIC blocks present on a concrete chip, like e.g. AMD TrueAudio. AMD TrueAudio could also be combined with the TeraScale-chips or some MIPS or ARM core. User:ScotXW^t@lk 11:24, 15 September 2015 (UTC)

"GCN 1.X" isn't officially a thing

I believe GCN 1.1 was first coined by Ryan Smith of Anandtech back when the 7790 launched (source: http://www.anandtech.com/show/6837/amd-radeon-7790-review-feat-sapphire-the-first-desktop-sea-islands). Officially, no such term exists. Each update is "Xth-generation GCN" or something along those lines. When Tonga was announced, the logical thing to do was call it GCN 1.2, but all of AMD's official literature refers to Tonga's, Carrizo's, and Fiji's version of GCN as third generation, not GCN 1.2 or even GCN 3 I don't think. Similarly, the newly announced Polaris is officially called fourth generation.161.6.214.24 (talk) 19:07, 14 February 2016 (UTC)

Yeah, while Anandtech's terminology was helpful when AMD stubbornly refused to properly name their GCN iterations, now that they have done so, Wikipedia should reflect AMD's official terminology.

It's understandable that some might not believe that Anandtech literally made up the "GCN 1.X" terminology, but Ryan Smith is crystal clear about this. It's all permanently documented in official Anandtech articles:

• In the first Anandtech article to use the "GCN 1.1" terminology, there is a section whose title is literally "What We’re Calling GCN 1.1" http://www.anandtech.com/show/6837/amd-radeon-7790-review-feat-sapphire-the-first-desktop-sea-islands/2

"For the sake of our sanity and for our discussions, in lieu of an official name from AMD we’re going to be retroactively renaming AMD’s GCN microarchitectures in order to quickly tell them apart. For the rest of this article and in future articles we will be referring to Southern Islands as GCN 1.0, while Bonaire’s microarchitecture will be GCN 1.1, to reflect the small changes between it and the first rendition of GCN."

• In the first Anandtech article to use the "GCN 1.2" terminology, there is a section whose title is literally "What We’re Calling GCN 1.2: http://www.anandtech.com/show/8460/amd-radeon-r9-285-review/2

"We do want to quickly remind everyone that the GCN 1.2 name, like GCN 1.1 before it, is unofficial. AMD does not publicly name these microarchitectures outside of development, preferring to instead treat the entire Radeon 200 series as relatively homogenous and calling out feature differences where it makes sense. In lieu of an official name and based on the iterative nature of these enhancements, we’re going to use GCN 1.2 to summarize the feature set."

• In its first article on Polaris (i.e. next-gen GCN), Anandtech abandons their made-up "GCN 1.X" terminology and adopts the official "Xth generation GCN" terminology that AMD had been using on their support documents since 3rd generation GCN. http://www.anandtech.com/show/9886/amd-reveals-polaris-gpu-architecture/2

"Thankfully for Polaris, RTG is revising their naming policies in order to present a clearer technical message about the architecture. Beginning with Polaris, RTG will be using Polaris as something of an umbrella architecture name – what RTG calls a macro-architecture – meant to encompass several aspects of the GPU. The end result is that the Polaris architecture name isn’t all that far removed from what would traditionally be the development family codenames (e.g. Evergreen, Southern Islands, etc), but with any luck we should be seeing more consistent messaging from RTG and we can avoid needing to create unofficial version numbers to try to communicate the architecture. To that end the Polaris architecture will encompass a few things: the fourth generation Graphics Core Next core architecture."

• Later in that same page, Anandtech does adopt a short-hand for "4th generation GCN" as simply "GCN 4", but this is at least in the spirit of the official AMD terminology.

"Officially RTG has not assigned a short-form name to this architecture at this time, but as reading the 8-syllable “fourth generation GCN” name will get silly rather quickly, for now I’m going to call it GCN 4."

It was tolerable to use the "GCN 1.X" terminology before, but Polaris has no "GCN 1.X" name. Anandtech was literally the source for these unofficial names and they are now falling in line with the "4th Generation GCN" terminology. Wikipedia should do so as well.

ImSpartacus (talk) 00:09, 17 May 2016 (UTC)

AFAIK it was me who consciously used Anandtech's denomination for this article. I agree that AMD's marketing department is lead by incompetent people and that we should bother to rephrase things in this article and in all article linking to it. I also actively did this. Does anybody know whether AMD's marketing department is hiring? User:ScotXW^t@lk 08:43, 21 November 2016 (UTC)

Processor register

The article Processor register does not mention GCN or TeraScale at all, while they document Nvidia's CUDA, but without citation. This article https://devblogs.nvidia.com/parallelforall/inside-pascal/ talks about the GP100 (non-GPU-chip) and names Register File Size per entire GPU (3840 KiB, 6144 KiB, 14336 KiB, 14336 KiB), not per SM or even per CUDA core. It also misses the width of a register. The article List of AMD graphics processing units and List of Nvidia graphics processing units mention the "Core config" (e.g. 2560:160:64 for the GP104-400 and 2304:144:32 = 36 CUs for the Polaris 10) meaning Shader Processors: texture mapping units: render output units. IMHO Shader Processors should rather be called "Single-precision shader processors" or something. AFAIU this is what Nvidia calls a CUDA core. This article does not talk about such a unit, but only about Graphics_Core_Next#Compute_Units, which roughly corresponds to a Nvidia Streaming Processor (SM). And one CU encompasses 64:4:1 shader processors:TMUs:ROPs.User:ScotXW^t@lk 08:59, 21 November 2016 (UTC)

GCN is a RISC SIMD? 16 or 32-wide ld/st engine?

Anyone looking at GCN docs will hardly say that it's RISC - judging either by number of instructions or their capabilities. Correct opposition of "VLIW" here is probably "scalar".

Also, afair, most GCN processors carry 32 ld/st engines per CU. Only some low-level were having 16 engines. I will look into docs to support my statement.

Bulat Ziganshin (talk) 10:34, 19 August 2017 (UTC)

AMD "HAINAN" ~ AMD Radeon 520/530 - a newly launched DGPU for laptops; Perhaps a re-branded SI/CIK GPU. Not listed here?

AMD has launched Radeon 520 and 530 for hybrid graphics laptops. I own one such model (AMD 520 dGPU on HP-15-BS576TX) and wonder about the GCN version whether it is 1.0 or 1.1. Because, the Linux graphics reports it as AMD HAINAN:

:~$ DRI_PRIME=1 glxinfo |grep -i Opengl* OpenGL vendor string: X.Org OpenGL renderer string: AMD HAINAN (DRM 2.50.0 / 4.13.0-16-generic, LLVM 5.0.0) OpenGL core profile version string: 4.5 (Core Profile) Mesa 17.2.2 OpenGL core profile shading language version string: 4.50 

It would be great, if the article can be updated to shed some light on the AMD R 520 in particular, because it looks like a re-branded card. 137.97.15.82 (talk) 02:51, 19 November 2017 (UTC)

You could try asking on #radeon in Freenode a couple of AMD devs hang out there. They are driver devs (so they probably don't know the marketing names either), but they might have other ideas/insight. Wikiinger (talk) 19:28, 20 November 2017 (UTC)

520 website Specs indicate Oland chip with 1st gen stated there. 530 specs state GCN 3rd gen but looks like an error as only Tonga and Fiji are known in this gen as discrete cards. Unless they have ported the GFX part of current APUs (Bristol Ridge) back to discrete versions.--Denniss (talk) 21:15, 20 November 2017 (UTC)

"Zero copy"

In Graphics_Core_Next#Unified_virtual_memory second image quote :

"GCN supports "unified virtual memory", hence enabling zero-copy, instead of the data, only the pointers are copied, "passed"

Pointer-passing isn't equivalent to "zero-copy" in my understanding, and isn't what the article "zero copy" describes - .. if only because the data isn't copied .. it's possible that the GPU performs a copy itself (which could be "zero copy" from the CPU perspective), but this isn't necessary.

Suggest simply removing the phrase "hence enabling zero-copy," . — Preceding unsigned comment added by 5.198.10.236 (talk) 16:46, 15 April 2018 (UTC)

More solid information is always welcome. Well. maybe not in the WP by idiots, for idiots. But due to lack of solid information from AMD directly, yes, make the article even more vague and ultimately useless. User:ScotXW^t@lk 07:42, 9 March 2019 (UTC)

Solid information vs. marketing buzz

This article was supposed to be about the microarchitecture. It is becoming more and more of a tally sheet… User:ScotXW^t@lk 07:43, 9 March 2019 (UTC)

All ISA documentation links are dead

They now redirect to documentation and search pages. Kreuner (talk) 12:32, 28 April 2024 (UTC)