Talk:Lockstep (computing)
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editThe Dual Modular Redundancy section has nothing to do with lockstep, specifically the Master/Slave system described there is NOT a lockstep system. It should be removed, resp. moved to a page on redundancy and replication. Same probably for the TMR section
CaliViking (talk) 03:53, 5 September 2010 (UTC) - I am confused about how CPU level lockstep execution is viable in computing architectures that include processor level memory cache as any attempt to transfer the cache content synchronously would cause serious detoriation in performance.
Would it make more sense to differentiate between application environment lockstep and CPU level lockstep?
VMware is referring to their vLockstep technology in this article: http://www.vmware.com/files/pdf/perf-vsphere-fault_tolerance.pdf . Interstingly enough, the technolgy refers to a lockstep interval, which indicates that this technology is not CPU lockstep, but rather a interval based asynchronous replication of data.
The article has no references and most likely contains information that is not accurate.
I can't understand how this is different from transaction-based computing ? — Preceding unsigned comment added by 72.195.132.8 (talk) 18:31, 2 February 2012 (UTC)