Talk:Nord-10

CPU definition

Since a microprocessor is a CPU, isn't the description of this CPU on 24 cards but also containing a microprocessor somewhat recursive? --Blainster 06:29, 4 June 2006 (UTC)

I think this is a misstatement - and what was intended was a "microcoded processor". I'm not sure it's true either - I seem to remember that the ND-100 (its successor) was microcoded, but that Nord-10 wasn't. But until I get a reference, I won't put it in. --Alvestrand 10:58, 4 June 2006 (UTC)

Oops, I missed this. The NORD-10 is certainly microcoded. toresbe 10:25, 6 December 2006 (UTC)

Reference? I've touched the CPU cards on both, and seem to remember people having to repair the instructions on the Nord-10 with a soldering iron, not a programming tool. On the ND-100, you could even upload new microcode versions. But if you say the cited source says so, I'll believe you! --Alvestrand 21:26, 6 December 2006 (UTC)

I'm restoring a NORD-10 in Oslo right now. :) I am positive the machine is microcoded. The panel is even updated "manually" by the microcode. :) toresbe 05:46, 7 December 2006 (UTC)

The ND 10 CPU

I will have to agree a little with your point. However, I am not that deep into the knowledge of the hardware of these computers that I can say for sure how to best phrase it.

I would however, want to say something about the registers of the CPU. The current text says that you have 8 registers per interrupt level, 6 of those are general registers and 2 are special - the program counter and the status register. I don't think this is quite accurate. The machine had 8 instructions per level but most of them were special purpose in that they were originally made for specific purposes and the machine instructions reflects as much.

P - the program counter register is already mentioned. It indicates where to read next instruction. S - the status register is also already mentioned. It contains several bits such as carry, zero bit (set when result is 0), sign bit etc. It also contains the current privilege level and for the versions that had paging (memory address translation) it would indicate if paging was active. Plus a couple of other things.

A - this is the accumulator register used for regular data. However, as it is the main register for this one is hard pressed to call it a general register per se. It was special purpose for accumulator and general calculations. However, you also had other registers that could be used to some extent for the same purpose and as such it belongs to this class of general registers. High level languages used this register to return values from functions - provided those values only required up to 16 bits.

D - data register. It was used to hold the upper 16 bits of a 32 bit result of multiplications and also contained the upper 16 bits of a numerator when dividing and the remainder as a result of that division. Other than this it could also be used a "general register".

B - base register. It was primarly used to hold a pointer to a record or struct of data. Note that the offsets was signed and so large structures in the operating system typically therefore made use of both negative and positive offsets. A result of this was that pointers to a structure typically pointed to some place in the middle of the structure rather than at the beginning as you might expect. High level languages tended to use only positive offsets however and if larger structures than 128 words were required would implement software address resolution (add 128 to the B register and then access the element using an offset of 128 less for example).

X - index register. This could also be used as pointer to structures but could also be used as index for arrays. One address mode was B + offset + X where B would point to a record, offset would be offset to where an array start in that record and X would be index in that array to access an element.

T - temporary register. It was used as a generic scratch register. It was also used as index register for string instructions. As memory was 16 bit word addressable, you had special instructions to extract bytes from a string and those instructions used T register as index register.

L - link register. It's primary use was that a call instruction would save P register in L before making the jump. Thus, the return address was saved in L and a return could be done by simply copying L over to P. Other than that it could be used as a temporary register. However, it was limited what you could do with it so in practice you used it only when you desperately needed one more register and all the others had already been spent. Of course, before using it for any other purpose you would have to save that register on a stack or something.

High level languages typically used B register as a stack pointer register. Thus, negative offsets was used for arguments etc and positive offsets was used for local variables - or vice versa. Depending on whether the stack grew up or down. Thus, X register was used for both array indexing and as pointers to structs. While B relative addresses was used for local variables and arguments.

I would based on this description count both L and B among the special purpose registers. X is also very much a special purpose register due to its role in address computation. A, D and T are the general purpose registers and X can under some conditions be used as a general register (when you don't need it for address computations). So 3 or 4 general registers and 5 or 4 special purpose registers rather than 2 special and 6 general registers in my book.

One thing that should be mentioned was also that the machine was very fast and accurate on interrupts for its time. This is due to each interrupt level having its own set of registers. When input from disk, keyboard or network etc was available the CPU did not have to do a costly context switch by saving registers to memory etc. It simply switched interrupt level and the register set was immediately ready for handling the data coming in. Each of these interrupts had its own interrupt level so for example interrupt from a keyboard switched the CPU to that interrupt level and so a code to handle keyboard interrupts could process immediately. When it had stored the character in a buffer it would switch back to user level and the program that was interrupted could continue as if nothing had had happened. This made the CPU very useful for real time applications.

I will make some changes to this page along the lines indicated here. However, I would like input and comments from others first. In particular those who know the CPU from a hardware point of view better than I do - I used to program this thing in MAC (assembler), NPL and PLANC and do not really have the big hardware overview of the machine.

I also think we should have a page describing MAC< NPL and PLANC respectively if it hasn't been done already - I will see if I can make such pages if I am in the right mood some day :)

salte 08:02, 6 December 2006 (UTC)

My goodness, you certainly seem to know a lot about the machine. By all means feel free to edit the article. The motto is "be bold" - you don't have to ask my permission! :) May I ask in what context you used this machine? Your memory of it is certainly impeccable! Yes, I agree on the subject of MAC, NPL and PLANC. Have now started NORD Programming Language. PLANC already exists. toresbe 10:24, 6 December 2006 (UTC)