Template:AMD Epyc 7002 series

Common features:

  • SP3 socket
  • Zen 2 microarchitecture
  • TSMC 7 nm process for the compute dies, GloFo 14 nm process for the I/O die
  • MCM with one I/O Die (IOD) and multiple Compute Dies (CCD), two core complexes (CCX) per compute die with up to 4 cores and 16 MiB of L3 cache per CCX
  • Eight-channel DDR4-3200
  • 128 PCIe 4.0 lanes per socket, 64 of which are used for Infinity Fabric in 2P platforms
Model Cores
(threads)
Compute chiplets Core
config[i]
Clock rate (GHz) Cache Socket Scaling TDP Release
date
Release
price
Base Boost L1 L2 L3
7232P 8 (16) 2 × CCD 4 × 2 3.1 3.2 32 KiB
i-cache
32 KiB
d-cache
(per core)
512 KiB
(per core)
32 MiB SP3 1P 120 W Aug 7, 2019 $450
7252 4 × 2 3.1 3.2 64 MiB 2P $475
7262 4 × CCD 8 × 1 3.2 3.4 128 MiB 155 W $575
7F32 8 × 1 3.7 3.9 128 MiB 180 W Apr 14, 2020[1] $2100
7272 12 (24) 2 × CCD 4 × 3 2.9 3.2 64 MiB
2P 120 W Aug 7, 2019 $625
7282 16 (32) 2 × CCD 4 × 4 2.8 3.2 64 MiB
$650
7302P 4 × CCD 8 × 2 3 3.3 128 MiB 1P 155 W $825
7302 2P $978
7F52 8 × CCD 16 × 1 3.5 3.9 256 MiB 240 W Apr 14, 2020[1] $3100
7352 24 (48) 4 × CCD 8 × 3 2.3 3.2 128 MiB
2P 155 W Aug 7, 2019 $1350
7402P 2.8 3.35 1P 180 W $1250
7402 2P $1783
7F72 6 × CCD 12 × 2 3.2 3.7 192 MiB 240 W Apr 14, 2020[1] $2450
7452 32 (64) 4 × CCD 8 × 4 2.35 3.35 128 MiB
2P 155 W Aug 7, 2019 $2025
7502P 2.5 3.35 1P 180 W $2300
7502 2P $2600
7542 2.9 3.4 225 W $3400
7532 8 × CCD 16 × 2 2.4 3.3 256 MiB 200 W $3350
7552 48 (96) 6 × CCD 12 × 4 2.2 3.3 192 MiB 2P 200 W $4025
7642 8 × CCD 16 × 3 2.3 3.3 256 MiB 225 W $4775
7662 64 (128) 8 × CCD 16 × 4 2 3.3 256 MiB 2P 225 W $6150
7702P 2 3.35 1P 200 W $4425
7702 2P $6450
7742 2.25 3.4 225 W $6950
7H12 2.6 3.3 280 W Sep 18, 2019
  1. ^ Core Complexes (CCX) × cores per CCX